Agilent / HP E2448A
Motorola 68360 (QUICC) Preprocessor Interface
Description
This Preprocessor Interface provides an easy way to connect an Agilent logic analyzer to a target system using the Motorola 68630 (QUICC) microprocessor.
For example, all necessary clocks are passed through by the preprocessor to the logic analyzer, ensuring that data is captured at the correct time.
Included with the preprocessor are configuration files which automatically label address, data and status lines, allowing end users to get started quickly.
In addition to the configuration files, an inverse assembler is included which disassembles state listings presenting the information in 68360 microprocessor mnemonics.
Key Points
Instructions that are pre-fetched, but not executed, are marked in the trace display
10-pin Background Debug Mode (BDM) connector provides connection to a BDM debugger
Target signal timing is adjustable from 3.5ns setup/0 s hold to 0s setup/3.5ns hold
Displays: All cycles with AS or DS asserted, and all show cycles
Specifications
Signal timing: 3.5ns
