Anritsu MP1764C
Digital Transmission Tester 12Gb/s
Description
This tester is used in combination with the MP1764D Error Detector for 12.5G BER testing.
The amplitude of the clock and data signals can be varied from 0.25 to 2Vp p while the offset can be adjusted to within 2V so that the amplitude and the offset margin can be measured.
The clock has a variable delay function so that time dependent characteristics or phase margins of the input clock and data can be measured.
An M series pseudo random pattern representative of actual conditions or a programmable pattern can be selected as cell data.
A GPIB function is provided, enabling automatic or remote measurement via an external controller.
Key Points
High quality waveform
Wide frequency range
Low FM/PM-noise clock generator
Complementary outputs of both data and clock
Specifications
Min. Data Rate: 50.00bps
Max. Data Rate: 12.50Gbps
Operation frequency: 50MHz to 12.5GHz
Data input Input voltage: 0.25 to 2.0Vp-p
Clock input Input voltage: 0.25 to 2.0Vp-p
Clock input Input delay variable range: -500 to +500ps
